One or more embodiments of the present invention relate generally to flip chip packaging and more specifically, to flip chip packages having enhanced thermal and mechanical performance.
In the semiconductor chip package industry, a chip carrying an integrated circuit is commonly mounted on a package carrier such as a substrate, a circuit board or a leadframe that provides electrical connections from the chip to the exterior of the package. In such a packaging arrangement called flip chip mounting, where the active side of the chip is mounted in an upside-down fashion over the substrate, the chip and the substrate are usually formed of different materials having mismatched coefficients of thermal expansion. As a result, the chip and the substrate experience significantly different dimension changes when heated that creates significant thermally-induced stresses and warpage in the electrical connections between the chip and the substrate. If uncompensated, the disparity in thermal expansion can result in degradation in the performance of the chip, damage to the solder connections between the chip and the substrate, or package failure.
Currently, flip chip packaging sees increasing challenges in the marketplace. As the size of the chip increases, the effect of a mismatch in the coefficient of thermal expansion between the chip and the substrate becomes more pronounced. In stacked die packages, the mismatch in the coefficient of thermal expansion between the die laminate and the package may be even greater than in single die packages. Moreover, the trend toward higher performing dies and environmental requirements demands more challenges and poses more difficulties for package reliability improvement.
To improve the reliability of flip chip packages, a number of approaches have been offered by the microelectronics industry. An encapsulant material or underfill is commonly used to fill the gap between the chip and the substrate to reduce the stress on the package during thermal cycling. Additionally, stiffeners are typically employed around the chip in the package assembly. Due to the highly rigid material of the stiffener, the package assembly would be less likely to be subject to package warping. To further enhance the rigidity of the flip chip package, heat spreaders or heat sinks are often mounted on top of the package to counter-balance the forces exerted by the thermal expansion mismatches between at least the chip and the substrate and dissipate heat. Still other approaches use novel substrate materials such as inorganic ceramic substrates to improve the reliability of the flip chip package.
Although the conventional approaches offer enhanced thermal and mechanical improvements to flip chip packages, they are limited in their use at the component and system levels. Consequently, such approaches are not optimized for these design levels. Moreover, in some applications, such approaches are limited in their use to packages with less than about 200 microns of warpage.
For these reasons and other reasons that will become apparent upon reading the following detailed description, there is a need for an improved flip chip package having enhanced thermal and mechanical performance.